1. Field of the Invention
The present invention relates to programmable devices and related electronic devices.
2. Summary of the Prior Art
In our previous patent, exemplified by GB 2371633 published 31 Jul. 2002, I described methods and means that enabled the design of a programmable controller to be based on programmable logic device technology and in which the user program is implemented as a physical circuit in a programmable logic device. Some particular advantages of such a design are those of high speed operation of the user program and flexibility in terms of the functionality that the user may select to include in their program. Such functionality being for instance the type that a microprocessor based programmable controller would provide in the form of add-on dedicated hardware; for example, multiple fast counters, positioning servos or motor controllers. A microprocessor based programmable controller does not have the processor power to support such functionality directly, but the programmable logic device programmable controller can do so because it configures its circuits as required in real physical logic.
This application describes further improvements and adaptations related to the use of programmable logic device based programmable controller technology for control of fast electronic and electrical circuits and for developing the program circuits that are configured in the programmable logic devices used.
Definitions
program-The term is used in two ways, firstly as a termmabledescribing a type or class of electronic device, andlogicsecondly when referred to in definite terms (usingdevice“the” or similar), it is used to distinguish the(PLD)component used in our invention to implement the userprogram circuit from other components in the invention.In the first sense, the term programmable logic device(PLD) is used to mean any electronic device or systemcapable of having a circuit configuration loaded into itand thereby being user programmed with a logic circuitimplemented and operating as a physical circuit. Ourusage of the term programmable logic device (PLD) isbroader than general industry usage, but does notinclude computer software emulation of a circuit, orassembly of a circuit by physically placing andconnecting components.PLDPCA Programmable Logic Device Programmable Controller.Particularly a programmable controller of the generaltype described in GB 2371633 and used for eithercontrolling plant, machinery, electrical or electronicequipment, or as a design, development and debuggingplatform for utilizing PLDs such as FPGAs or CPLDs.FPGAField Programmable Gate Array. A type of programmablelogic device (PLD).An FPGA is used to provide the programmable logicdevice (PLD) in the preferred embodiment.CPLDComplex Programmable Logic Device A type ofprogrammable logic device (PLD).Reference can be made to CPLDs and FPGAs from Xilinx,Inc* and other manufacturers to clarify the nature ofthe devices. Examples of applicable devices are XilinxXC2C256 and XC2S200E devices respectively.flashA memory device that retains its data when power ismemorylost.(FM)monitoringThe computer or other device by which the user controlscomputerthe PLDPC.(MC)communica-Microprocessor or other circuit that facilitatestionscommunications between the monitoring computer (MC)circuitand PLDPC.(CC)phase lockedA circuit used in the synthesis and synchronization ofloop (PLL)signals of a particular frequency.voltageA standard device that generates system reset levelsmonitordependent on the level of the supply voltage.and resetgenerator(VMRG)I/OInput/Output. Particularly relating to signals orconnections to a device or circuit from other externaldevices or circuits.userSpecial circuits normally automatically combined withprogramthe user program circuit by the PLDPC software andframeworkconfigured in the programmable logic device (PLD) to(UPF)support the data access and control functions of thesoftware.Under some circumstances, the user program framework(UPF) may also be implemented outside of the program-mable logic device (PLD) and suitably interfaced to it.configura-A series of ‘1’s and ‘0’s as used to configure a FPGAtion bitor CPLD or other programmable logic device (PLD).pattern(CBP)userThe circuit defined by the user as a way of specifyingprogramthe functionality required of the programmed PLDPC,circuitgenerally entered in schematic form, but may be entered(UPC)in other forms such as a netlist, a ladder diagram, aHardware Description Language listing, etc., if sodesired.The user program circuit (UPC) is combined with theuser program framework (UPF) and translated into aconfiguration bit pattern (CBP) that is used toconfigure the programmable logic device (PLD).The user program circuit (UPC) can be thought of andreferred to as both a circuit and a program. The userprogram framework (UPF) is not considered to be part ofthe user program circuit (UPC). In GB 2371633 a userprogram circuit (UPC) is referred to as a LogicProcessing Circuit or LPC.forcingForcing is a standard term used with machine controlprogrammable controllers, and means the holding of asignal at a defined level even when normal circuitoperation is attempting to drive the signal to adifferent value.RAMRandom Access Memory.shiftGB 2371633 teaches methods of reading and writing statechaindata contained within a user program circuit (UPC). Onemethod is to have the flip-flops used in the userprogram circuit (UPC) switched into the form of a shiftregister, or shift chain, accessible to the monitoringcomputer (MC) during the data access interval.Other methods are also discussed.In this document we will use the term “shift chain”to refer to all of the methods previously taught unlessthe context precludes such general use.indirectlyA device, such as a RAM, whose flip-flops cannot beaccessiblelinked directly into the shift chain, but that can havedevicean interface circuit linked into the shift chain added(IAD)to it to access its data or interface transactions.fixedFixed circuitry providing support functions for thesupportPLDPC operation.circuit(FSC)fixedCircuits of a fixed configuration independent of thecircuitryusage of the PLDPC as opposed to circuits configuredusing programmable logic techniques during operationof the PLDPC.userA state machine in the user program framework (UPF)programthat controls the activities and operation of the usermanagerprogram circuit (UPC).(UPM)logicThe slice of time during which the user program circuitprocessing(UPC) operates as the circuit specified by the user.interval(LPI)dataThe slice of time during which the user program circuitaccess(UPC) exchanges state data with the monitoring computerinterval(MC).(DAI)activeA transition in a clock pulse waveform that causes aclockflip-flop to sample its inputs and change state astransitionappropriate. The active clock transitions (ACTs)(ACT)referred to in this specification are always thepositive going edges, but the invention could equallywell be implemented using negative edge clocking.activeThe interval between any one active clock transitiontransition(ACT) and the next.interval(ATI)peripheralThe circuits external to and being controlled by thecircuitsPLDPC.monitor-A flip-flop used in the user program circuit (UPC) thatablecan be monitored by a monitoring computer (MC).flip-flop(MFF)userSignal used to enable monitorable flip-flops (MFFs) tocircuitfunction as user program circuit (UPC) flip-flopsenableduring logic processing intervals (LPIs).(UCE)shiftSignal used to enable monitorable flip-flops (MFFs) tochainfunction as Shift Chain flip-flops during data accessenableintervals (DAIs).(SCE)tap clockSignal used to enable a flip-flop to sample and storeenablethe value of a user circuit signal as it exists after(TCE)the last enabled clock pulse in a logic processinginterval (LPI), and before the next data access interval(DAI), hence enabling the monitoring computer todetermine the current value of the signal. The word“tap” is derived from the name of a Signal Tapcomponent in the user library.latchingIn this specification, the term “latching” meansthe sampling and storing of an input value on a clockedge by an edge triggered flip-flop, and does not referto the transmission of a value while the clock is atone value, and the holding of the value while the clockis at the other value.UPCThe library of components supplied with the PLDPC forcomponentuse in designing user program circuits (UPCs). Thelibrarycomponents use monitorable flip-flops (MFFs) so thatthe monitoring computer (MC) may read and write theuser program circuit (UPC) state data. They may appearto the user as schematic symbols, or in some othersuitable form.preloadA test component, available in the user program circuitbuffer(UPC) component library that enables the user tocontrol the state of any particular signal at the startof the settling period prior to the first active clocktransition (ACT) in each logic processing interval(LPI), and used for a single step test.HMIHuman-Machine Interface. An industry standard termSCADASupervisory Control and Data Acquisition. An industrystandard term*All trademarks are acknowledged as the property of their respective owners.